May 31, 2005

• VMETRO's Rugged 3U Processor Combines PowerPC and FPGA
• S2C Delivers Breakthrough FPGA-Based ESL Design With TAI IP; Plug-and-Play TAI IP Interconnect Approach Accelerates Innovation of IP and SoC Time to Market by 3 to 6 months
• Altera and PMC-Sierra Introduce Multi-Serial Protocol Development System

May 26, 2005

• Mentor Graphics First Vendor to Achieve PCI Express Intellectual Property Compliance on NitAl Platform

May 25, 2005

• Nallatech Forges Unique Alliance to Advance FPGA-Based High-Performance Computing
• SANYO Selects Mentor Graphics Catapult C Synthesis for Next-Generation Multimedia LSI Design
• New Lattice TransFR Solution Enables Transparent FPGA Reconfiguration While System Operates
• GiDEL Ships PROCSpark II Development Board Featuring Altera's Low-Cost FPGAs

May 24, 2005

• FlexASIC™ Broadens Appeal by Adding Magma Blast Create SA Support to Enhance Performance and Design Flexibility
• Synopsys i-Virtual Stepper System for Photomask Qualification Implemented by UMC
• LSI Logic Eliminates Mask Charges for Entry Level Platform ASIC Solutions

May 23, 2005

• Initial Wave of Intellectual Property Support For New LatticeXP FPGA Family Now Available
• FS2 Introduces System Navigator for the New AMD Geode LX 800@0.9W Processor; Debug That Will Enable Next Generation of Mobile Applications
• Celoxica ESL Tool Gets Faster and More Physical; The Leading ESL Design Suite for Algorithm Acceleration Sets New Standards in Performance and Ease-of-Use, Optimizes the Connection to SoC Flows
• Cypress Introduces Industry's First 2.4-GHz Radio-on-a-Chip with Programmable Mixed Signal Array; Programmable Radio-on-a-Chip Melds Two Blockbuster Cypress Technologies -- WirelessUSB and PSoC
• Xilinx Improves Performance and Productivity for Virtex-4 Platform FPGA Designs With PlanAhead 7.1 Tool

May 20, 2005

• Nu Horizons Electronics Corp. Announces Availability of Embedded Development Kit -EDK- 7.1i Featuring New Xilinx MicroBlaze-TM- 4.0 Soft Processor

May 19, 2005

• Xilinx Strengthens DSP IP Library With New Floating-Point and Digital Video Broadcasting S2 Cores
• Lockheed Martin X-35 Chief Test Pilot Delivers Keynote Address at The MathWorks International Aerospace and Defense Conference

May 18, 2005

• FishTail Joins Synopsys in-Sync Program
• Nallatech Simplifies Digital Communication System Development With Launch of New Virtex-4 XtremeDSP Development Kit
• Memec Simplifies Programmable Systems Design With New Mini-Modules; Complete Embedded Processor System Available on Small Module; Thumb-Size Modules Include Xilinx Virtex-4 or Spartan-3 FPGA; Daughterboard Can be Dropped Into Early-Production System
• Actel Quality Program Receives STACK Certification
• Now Shipping: New Cyclone II Development Kits for Nios II Embedded Processor, DSP, and PCI Designs

May 17, 2005

• Actel Provides Smaller, Lighter FPGA Packaging for Military and Aerospace Markets
• Engineers and Students Now Can Program DSPs with National Instruments LabVIEW; NI LabVIEW DSP Module Offers Graphical Programming Tools for Texas Instruments DSPs
• EVE Extends ZeBu Platform Capabilities, Adds Transaction-Level Interface to Native Testbench in Synopsys' VCS Comprehensive RTL Verification Solution, Support for SystemVerilog Assertions and Design Clustering of Up to 64 FPGAs
• Atmel and Tower Semiconductor Announce Joint CMOS Image Sensor Technology and Product Development Agreement; Tower's 0.18-Micron Technology Will Be Used in Atmel's Next-Generation CMOS Image Sensor Products
• Tundra Tsi568A(TM) Serial RapidIO(R) Switch Now Sampling - Proven Interoperability With Wide Range of RapidIO Systems, Boards, and Products