Source: Avnet
July 21, 2008

Avnet Offers New Xilinx On-Ramp Technical Sessions for FPGA Design

Avnet Subject Matter Experts Demonstrate Advantages of Xilinx Spartan-3A and Virtex-5 FXT Platforms in FPGA Designs

PHOENIX -- July 21, 2008 -- Avnet Electronics Marketing, an operating group of Avnet, Inc. (NYSE: AVT), has launched eight new On-Ramp Technical Sessions™ featuring programmable solutions from Xilinx®. Avnet subject matter experts are visiting customers across the globe to present the latest On-Ramp Technical Sessions featuring live presentations and demonstrations. On-Ramps are offered free of charge for qualified Avnet customers.

New On-Ramp sessions include:

-- Introduction to FPGA Design – Provides an overview of the Xilinx product offering, focused on the low-cost Spartan®-3A family, including an explanation of the Field Programmable Gate Array (FPGA) development process using ISE® 10.1 Design Suite.

-- Introduction to the MicroBlaze™ processor – An introduction to the Xilinx MicroBlaze processor and overview of the MicroBlaze development process using Xilinx Platform Studio 10.1.

-- Spartan-3A FPGA Configuration Techniques – Provides an overview of the configuration options for the Spartan-3A family (SPI, BPI, processor, and multi-boot) – including the cost, performance, and architecture trade-offs involved.

-- The Cypress PSoC as an FPGA Companion Chip – Demonstrates how Cypress PSoC Mixed Signal Array controllers can be used as a companion chip next to Spartan-3A devices.

-- Virtex®-5 FXT Platform PowerPC Processor – An overview of the PowerPC 440 processor core, embedded in the new Xilinx Virtex-5 FXT FPGA family. Participants will learn how to create a PowerPC system using the Xilinx Base System Builder wizard.

-- Virtex-5 FXT Platform GTX Transceiver – Offers participants an overview of the high-speed GTX serial transceiver technology included on the new Xilinx Virtex-5 FXT FPGA family. A step-by-step analysis of the function blocks making up the transceiver is covered and workings of the transmitter, receiver, power, CRC and clocking are also highlighted.

-- Embedded Processor Design Using Project Navigator Design Flow – Provides a step-by-step demonstration using the ISE Project Navigator to design an embedded sub-module system using the Avnet Virtex-5 FXT platform evaluation board.

-- Virtex-5 LXT & SXT platform PCIe Development Board MIG DDR2 Controller Design – Demonstrates how to create a DDR2 controller using MIG 2.2, port UFC and HDL files to the Avnet Virtex-5 LXT & SXT platform PCIe development board. Participants also learn to implement and utilize the Chipscope™ Pro analyzer into their designs.

“On-Ramp Technical Sessions were created for our customers to give them an opportunity to preview the hottest design techniques in a practical one-on-one manner,” said Tim Barber, senior vice president of design chain business development worldwide for Avnet Electronics Marketing. “The new On-Ramps are a great complement to the sessions we launched in February and offer designers a preview of the latest FPGA design technology available from the Spartan-3A and Virtex-5 FXT families.”

For more information, or to request an On-Ramp Technical Session, please visit: www.em.avnet.com/xilinxonramp.