FROM
THE EDITOR
This week, we look under the hood of the most awesomely powerful design tool in the FPGA designer’s arsenal. That’s right, we’re talking about the FAE. If we took all the FPGA projects saved by FAEs and lined them up end-to-end… everyone would understand where we’re going with this week’s newest feature article.
Also new this week, Tom Dewey of Mentor Graphics gives us tips on re-using the most valuable IP your company will ever obtain – your own. By not re-inventing the wheel with every project you can make your schedules shorter, your designs more reliable, and your job easier and more fun.
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Kevin Morris – Editor in Chief
Techfocus Media, Inc.
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EVENTS & ANNOUNCEMENTS
Only Actel® gets you close to “zero power.”
Any other claims of low power superiority are just that. According to their own data, Altera® and Xilinx® use between 10 and 1700 times the power of Actel IGLOO® FPGAs, depending on device and mode.
See the proof.
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Virtualization is not Enough! - Secure HyperCell Technology is here. OKL4 Secure HyperCell Technology integrates virtual machines with lightweight native execution environments on the OKL4 microkernel. CTO Gernot Heiser and VP of Product Management Rob McCammon outline how OKL4's high performance and capability-based mandatory access control allow the design of more secure, more reliable embedded systems.
Click here for more info
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Renaissance FAEs
Our Once and Future Saviors
(Kevin Morris)
In classical music, they are the organists.
My brother, an accomplished professional trumpet player, had just completed a performance for solo piccolo trumpet and organ. I was looking at his immaculately maintained instrument and noticed that one of the tuning slides was so light, it seemed it could just fall off the horn if the performer held it at the wrong angle.
“What would you do if this fell off during a performance?” I asked.
Seemingly without thinking, he replied “Oh, the organist would catch it and replace it.” [more]
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Building an FPGA Design Repository
by Tom Dewey,
Mentor Graphics Corporation
How often has it happened that you have just finished a complex module for an FPGA project only to later find out that a very similar module was completed a month earlier by another team within the company? Not only have you just wasted several weeks of your time, but this wasted time has also cost the company money. A quick way to become a hero by saving the company both time and money is to put in place a simple reuse repository to prevent this scenario from ever happening again.
Today many design teams and companies are considering putting a reuse repository infrastructure together. [more]
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